Aerospace · Radar · Defence

Mission-critical systems

Over fifteen years in national satellite, radar and air traffic control programs: on-board software, FPGA design and UVM verification.

Mission-critical softwareFPGA & UVMRadar & Satellites

Problems we solve

Reduces technical risk in highly complex subsystems.
Cuts integration failures between hardware and software.
Lowers verification uncertainty with functional coverage and traceable evidence.
Reduces vendor lock-in through in-house IP and methodology.
Shortens development time with reusable assets and automation.
Ensures the traceability and auditability demanded by critical environments.

Technical capabilities

Aerospace & satellite software

On-board software, payload management, radar control, and platform verification and testing.

On-boardPayloadRadar

Mission-critical software

Systems designed for high reliability, fault tolerance, traceability and controlled operation.

Fault toleranceTraceability

FPGA/RTL digital design

FPGA IP cores for satellite and radar subsystems (VHDL, Verilog, SystemVerilog), on Microchip, Xilinx/AMD and Altera devices.

VHDLVerilogSystemVerilogFPGA-on-SoC

UVM functional verification

Verification at three levels —RTL, Netlist and Post-Place & Route— with constrained-random testing, assertions and functional coverage closure.

UVMRTLNetlistPost-P&R

Embedded systems & Linux PREEMPT_RT

Linux with the PREEMPT_RT kernel for low latency and predictable timing; subsystem control and integration.

LinuxPREEMPT_RTC/C++

Microelectronics & optical communications

Transceivers for coherent optical communications (10 to 600 Gbps), single-carrier and multi-carrier systems, VLSI implementations and FPGA algorithm prototyping (ADFE, FIR/IIR filters).

VLSICoherent opticsADFE

AI-assisted data analysis

AI applied to telemetry and signals, with explainable and reproducible criteria.

TelemetryExplainable AI

Projects

Every project is presented with the same structure: problem, solution, technology, outcome and deliverables.

ASTERIX data router (air traffic gateway)

Problem: The national air traffic control system must distribute tracking data from multiple radars to different agents in real time and reliably, with operational reconfiguration without downtime.
Solution: Radar data router/gateway compatible with Eurocontrol's ASTERIX standard, deciding which data category is transmitted to each agent; file-configurable with dynamic configuration changes at runtime.
Technology: ASTERIX protocol (Eurocontrol), real-time processing, modular high-availability and robust architecture.
Outcome: Real-time routing of tracking information for all air traffic, deployed on a nationwide, redundant architecture.
Deliverables: ASTERIX routing software and technical documentation.

ASTERIXEUROCONTROLTiempo realAlta disponibilidad

Radar data reprojection for mobile radars

Problem: Radars mounted on mobile platforms (icebreaker ships, aircraft) deliver data referenced to the platform's orientation, not true north, preventing direct operational use.
Solution: Software that aligns radar data to true north in real time, compensating for the platform's heading, roll and pitch.
Technology: Real-time geometric processing and fusion with attitude and position data.
Outcome: Radar imagery correctly georeferenced and oriented from moving platforms.
Deliverables: Reprojection software and documentation.

Tiempo realGeorreferenciaciónFusión de datos

Weather radar software requirements specification

Problem: A national weather radar program required a complete, traceable software requirements specification for its modules, plus interface definitions with the rest of the hardware.
Solution: Requirements specification (SRS) for the PC-based modules —Control Unit (UC), Processing (UP), Storage (UA) and Antenna Control (CA)— and support for ICD definition with GSS, RGP, PRX and MTX, after working sessions with the leads of every subsystem.
Technology: IEEE requirements-engineering practices and interface control documents (ICD).
Outcome: A complete, traceable specification, the baseline for the radar's software development.
Deliverables: UC/UP/UA/CA SRS and ICD support documentation.

SRSIEEEICDTrazabilidad

Embedded operating system stack of the radar

Design and development of UC, UA and UP software

Problem: Implement the radar's software subsystems according to specification, with reliable, low-latency, maintainable operation.
Solution: Design and development of the Control, Storage and Processing units: data persistence, operating strategies, table management, subsystem programming and the operator interface.
Technology: Embedded software on Linux, control systems and subsystem integration.
Outcome: Radar subsystems developed and deployed according to specification.
Deliverables: UC/UA/UP software and documentation.

Linux embebidoC++Integración

Embedded system terminal running the PREEMPT_RT kernel

Debian Linux operating system and development infrastructure

Problem: The radar equipment and other aerospace projects required a unified, reproducible operating system base with low-latency support (PREEMPT_RT kernel).
Solution: Custom embedded operating system based on Debian Linux with the PREEMPT_RT kernel (low latency), with its development IDE, repository structure and .deb packaging from a local repository.
Technology: Debian Linux, PREEMPT_RT, .deb packaging and a local installation repository.
Outcome: A unified, reproducible, maintainable operating system platform for all equipment.
Deliverables: Embedded OS, IDE, repository structure and deb package system.

DebianPREEMPT_RTDevOps embebido

Operational radar imagery console

Problem: Operators need a unified view of radar imagery coming from different radars and information sources.
Solution: Operational console that integrates and displays data from multiple radars and sources in real time.
Technology: Real-time visualization and multi-source integration.
Outcome: Unified, multi-source operational visualization for operators.
Deliverables: Operational console software and documentation.

VisualizaciónMulti-fuenteTiempo real

FPGA design and UVM verification for satellites

Problem: Satellite subsystems demand high-reliability digital design and exhaustive, traceable, reproducible functional verification.
Solution: FPGA IP core design and UVM functional verification of subsystems —power, data, imaging, communications and control— at three levels: RTL, Netlist and Post-Place & Route.
Technology: VHDL / Verilog / SystemVerilog, UVM and a per-protocol agent library (SpaceWire, CCSDS, CAN/SpaceCAN, AMBA, SPI, RS422).
Outcome: Subsystems verified with full traceability and reproducible baselines, plus a reusable verification IP library.
Deliverables: RTL/HDL, UVM testbench, coverage models, PASS/FAIL reports, traceability matrices and bitstream.

FPGAVHDLSystemVerilogUVMSpaceWireCCSDS

Requirements-driven systems engineering diagram (V-model)

Methodology

Managing critical systems demands a requirements-driven engineering discipline, with end-to-end traceability and rigorous configuration control.

V-Model: every requirement, with a unique identifier, is linked to its design, verification and evidence.
Formal phase reviews and configuration control with Git — every result tied to an exact repository state, every delivery tagged and reproducible.
Documentation versioned as code, with an auditable history and objective evidence for audits; AI is used as assistance, always under human technical supervision and responsibility.
In-house UVM agent library per protocol (UART, SPI, I2C, SpaceWire, CCSDS, CAN/SpaceCAN, RS422, Ethernet, AMBA APB/AHB/AXI).

UVM verification scope

Power subsystemsData subsystemsImaging subsystemsCommunications subsystemsControl subsystemsMemoriesRadars

Reference standards

NYTT works with a management system aligned with the principles of ISO 9001. ECSS (ESA engineering and product assurance), DO-254, MIL-STD-882 and the CCSDS verification framework are applied as engineering reference frameworks according to each project's requirements.

How we work

NYTT joins each client's project in whatever mode fits best:

Turnkey development

from requirement to verified delivery.

Engineering team reinforcement

FPGA, UVM and embedded-systems specialists embedded in the client's team.

Independent verification (IV&V)

UVM functional verification of third-party designs.

Subsystem integration

mission-critical hardware and software.

IP development

reusable RTL cores and verification agents.

Technical & verification audits

design, coverage and traceability reviews.

Technology transfer & training

digital design and UVM verification courses.

Support & maintenance

evolution of long-lifecycle systems.

From the lab

STE — FPGA test bench for radar DSP and microelectronics on FPGA

Visit the lab →

Mission-critical engineering for aerospace, defence and industry.